Verilog Operators

Operators perform an operation on one or more operands within an expression. An expression combines operands with appropriate operators to produce the desired functional expression.

1. Arithmetic Operators

For the FPGA, division and multiplication are very expensive, and sometimes we cannot synthesize division. If we use Z or X for values, the result is unknown. The operations treat the values as unsigned.

2. Bitwise Operators

Each bit is operated, the result is the size of the largest operand, and the smaller operand is left extended with zeroes to the bigger operand's size.

3. Reduction Operators

These operators reduce the vectors to only one bit. If there are the characters z and x, the result can be a known value.

4. Relational Operators

These operators compare operands and results in a 1-bit scalar Boolean value. The case equality and inequality operators can be used for unknown or high impedance values (z or x), and if the two operands are unknown, the result is a 1.

5. Logical Operators

These operators compare operands and results in a 1-bit scalar Boolean value.

6. Shift Operators

These operators shift operands to the right or left, the size is kept constant, shifted bits are lost, and the vector is filled with zeroes.

7. Assignment Operators

There are three assignment operators, each of which performs different tasks, and are used with different data types:

• assign (continuous assignment)
• <= (non-blocking assignment)
• = (blocking assignment)

8. Other Operators

These are operators used for condition testing and to create vectors.

9. Operators Precedence

The order of the table tells what operation is made first. The first one has the highest priority. The () can be used to override the default.